https://gcc.gnu.org/g:b35f9c2535a34279898bf8795e748161fd1704ed
commit r15-5804-gb35f9c2535a34279898bf8795e748161fd1704ed
Author: Andrew Pinski <quic_apin...@quicinc.com>
Date: Thu Nov 21 10:51:38 2024 -0800
aarch64: Fix up flags for vget_low_*, vget_high_* and vreinterpret
intrinsics
These 3 intrinsics will not raise an fp exception, or read FPCR. These
intrinsics,
will be folded into VIEW_CONVERT_EXPR or a BIT_FIELD_REF which is already
set to
be const expressions too.
Built and tested for aarch64-linux-gnu.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc (VREINTERPRET_BUILTIN): Use
FLAG_NONE instead of FLAG_AUTO_FP.
(VGET_LOW_BUILTIN): Likewise.
(VGET_HIGH_BUILTIN): Likewise.
Signed-off-by: Andrew Pinski <quic_apin...@quicinc.com>
Diff:
---
gcc/config/aarch64/aarch64-builtins.cc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-builtins.cc
b/gcc/config/aarch64/aarch64-builtins.cc
index e26ee323a2de..04ae16a0c76c 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -911,7 +911,7 @@ static aarch64_fcmla_laneq_builtin_datum
aarch64_fcmla_lane_builtin_data[] = {
2, \
{ SIMD_INTR_MODE(A, L), SIMD_INTR_MODE(B, L) }, \
{ SIMD_INTR_QUAL(A), SIMD_INTR_QUAL(B) }, \
- FLAG_AUTO_FP, \
+ FLAG_NONE, \
SIMD_INTR_MODE(A, L) == SIMD_INTR_MODE(B, L) \
&& SIMD_INTR_QUAL(A) == SIMD_INTR_QUAL(B) \
},
@@ -923,7 +923,7 @@ static aarch64_fcmla_laneq_builtin_datum
aarch64_fcmla_lane_builtin_data[] = {
2, \
{ SIMD_INTR_MODE(A, d), SIMD_INTR_MODE(A, q) }, \
{ SIMD_INTR_QUAL(A), SIMD_INTR_QUAL(A) }, \
- FLAG_AUTO_FP, \
+ FLAG_NONE, \
false \
},
@@ -934,7 +934,7 @@ static aarch64_fcmla_laneq_builtin_datum
aarch64_fcmla_lane_builtin_data[] = {
2, \
{ SIMD_INTR_MODE(A, d), SIMD_INTR_MODE(A, q) }, \
{ SIMD_INTR_QUAL(A), SIMD_INTR_QUAL(A) }, \
- FLAG_AUTO_FP, \
+ FLAG_NONE, \
false \
},
