https://gcc.gnu.org/g:65df27bb0ca5ccecf335a64fdfe954119c9095cd

commit r15-5776-g65df27bb0ca5ccecf335a64fdfe954119c9095cd
Author: Tejas Belagod <tejas.bela...@arm.com>
Date:   Fri Jul 26 14:47:12 2024 +0530

    aarch64: Fix ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS
    
    This patch enables ACLE macro __ARM_FEATURE_SVE_VECTOR_OPERATORS to indicate
    that C/C++ language operations are available natively on SVE ACLE types.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
            __ARM_FEATURE_SVE_VECTOR_OPERATORS.

Diff:
---
 gcc/config/aarch64/aarch64-c.cc | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc
index 689c763cd458..3cc2c97c6d8e 100644
--- a/gcc/config/aarch64/aarch64-c.cc
+++ b/gcc/config/aarch64/aarch64-c.cc
@@ -193,15 +193,19 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
   aarch64_def_or_undef (TARGET_SIMD_RDMA, "__ARM_FEATURE_QRDMX", pfile);
   aarch64_def_or_undef (TARGET_SVE, "__ARM_FEATURE_SVE", pfile);
   cpp_undef (pfile, "__ARM_FEATURE_SVE_BITS");
+  cpp_undef (pfile, "__ARM_FEATURE_SVE_VECTOR_OPERATORS");
   if (TARGET_SVE)
     {
       int bits;
+      int ops = 1;
       if (!BITS_PER_SVE_VECTOR.is_constant (&bits))
-       bits = 0;
+       {
+         bits = 0;
+         ops = 2;
+       }
       builtin_define_with_int_value ("__ARM_FEATURE_SVE_BITS", bits);
+      builtin_define_with_int_value ("__ARM_FEATURE_SVE_VECTOR_OPERATORS", 
ops);
     }
-  aarch64_def_or_undef (TARGET_SVE, "__ARM_FEATURE_SVE_VECTOR_OPERATORS",
-                       pfile);
   aarch64_def_or_undef (TARGET_SVE_I8MM,
                        "__ARM_FEATURE_SVE_MATMUL_INT8", pfile);
   aarch64_def_or_undef (TARGET_SVE_F32MM,

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