https://gcc.gnu.org/g:89a27cf6b1354cc80d834d71f7a3aa137d605e94
commit r12-10832-g89a27cf6b1354cc80d834d71f7a3aa137d605e94 Author: liuhongt <hongtao....@intel.com> Date: Thu Nov 21 23:57:38 2024 -0800 Fix uninitialized operands[2] in vec_unpacks_hi_v4sf. It could cause weired spill in RA when register pressure is high. gcc/ChangeLog: PR target/117562 * config/i386/sse.md (vec_unpacks_hi_v4sf): Initialize operands[2] with CONST0_RTX. (cherry picked from commit ba4cf2e296d8d5950c3d356fa6b6efcad00d0189) Diff: --- gcc/config/i386/sse.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3ad96f321a67..09b308e03c7c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9129,7 +9129,10 @@ (match_dup 2) (parallel [(const_int 0) (const_int 1)]))))] "TARGET_SSE2" - "operands[2] = gen_reg_rtx (V4SFmode);") +{ + operands[2] = gen_reg_rtx (V4SFmode); + emit_move_insn (operands[2], CONST0_RTX (V4SFmode)); +}) (define_expand "vec_unpacks_hi_v8sf" [(set (match_dup 2)