https://gcc.gnu.org/g:ae0d842f3e7a119b21a000824b10920614088684
commit r15-5573-gae0d842f3e7a119b21a000824b10920614088684
Author: Christoph Müllner <christoph.muell...@vrull.eu>
Date: Thu Nov 21 16:53:49 2024 +0100
testsuite: tree-ssa: Limit targets for vec perm tests
Recently added test cases assume optimized code generation for certain
vectorized code. However, this optimization might not be applied if
the backends don't support the optimized permuation.
The tests are confirmed to work on aarch64 and x86-64, so this
patch restricts the tests accordingly.
Tested on x86-64.
PR117728
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/satd-hadamard.c: Restrict to aarch64 and x86-64.
* gcc.dg/tree-ssa/vector-8.c: Likewise.
* gcc.dg/tree-ssa/vector-9.c: Likewise.
Signed-off-by: Christoph Müllner <christoph.muell...@vrull.eu>
Diff:
---
gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/vector-8.c | 4 ++--
gcc/testsuite/gcc.dg/tree-ssa/vector-9.c | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c
b/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c
index 576ef01628cc..7a22772f2e63 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c
@@ -40,4 +40,4 @@ x264_pixel_satd_8x4_simplified (uint8_t *pix1, int i_pix1,
uint8_t *pix2, int i_
return (((uint16_t)sum) + ((uint32_t)sum>>16)) >> 1;
}
-/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop4" } }
*/
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop4" {
target { aarch64*-*-* x86_64-*-* } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c
b/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c
index bc2269065e4f..3a7b62b640d6 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c
@@ -30,5 +30,5 @@ void f (vec *p_v_in_1, vec *p_v_in_2, vec *p_v_out_1, vec
*p_v_out_2)
*p_v_out_2 = v_out_2;
}
-/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop1" } } */
-/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" } }
*/
+/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop1" { target { aarch64*-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" {
target { aarch64*-*-* x86_64-*-* } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c
b/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c
index e5f898e02814..ba34fb163d67 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c
@@ -30,5 +30,5 @@ void f (vec *p_v_in_1, vec *p_v_in_2, vec *p_v_out_1, vec
*p_v_out_2)
*p_v_out_2 = v_out_2;
}
-/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop1" } } */
-/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" } }
*/
+/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended"
"forwprop1" { target { aarch64*-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" {
target { aarch64*-*-* x86_64-*-* } } } } */
