https://gcc.gnu.org/g:703839b8bd1ee667ae165ac435b0acedfb72cf4b
commit r15-5540-g703839b8bd1ee667ae165ac435b0acedfb72cf4b Author: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com> Date: Sun Oct 13 14:42:53 2024 +0200 testsuite: arm: Use effective-target for pure-code/* tests Update test cases to use -mcpu=unset/-march=unset feature introduced in r15-3606-g7d6c6a0d15c. gcc/testsuite/ChangeLog: * gcc.target/arm/pure-code/no-literal-pool-m0.c: Use effective-target arm_cpu_cortex-m0. * gcc.target/arm/pure-code/no-literal-pool-m23.c: Use effective-target arm_cpu_cortex-m23. * gcc.target/arm/pure-code/pr94538-1.c: Likewise. * gcc.target/arm/pure-code/pr109800.c: Use effective-target arm_arch_v7em_hard. * lib/target-supports.exp: Define effective-target arm_cpu_cortex_m0, arm_cpu_cortex_m23 and arm_arch_v7em_hard. Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com> Diff: --- gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c | 5 +++-- gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c | 5 +++-- gcc/testsuite/gcc.target/arm/pure-code/pr109800.c | 6 ++++-- gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c | 5 +++-- gcc/testsuite/lib/target-supports.exp | 3 +++ 5 files changed, 16 insertions(+), 8 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c index 4f9265eca853..c38d1f557295 100644 --- a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c +++ b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */ -/* { dg-options "-mpure-code -mcpu=cortex-m0 -march=armv6s-m -mthumb -mfloat-abi=soft" } */ +/* { dg-require-effective-target arm_cpu_cortex_m0_ok } */ +/* { dg-options "-mpure-code" } */ +/* { dg-add-options arm_cpu_cortex_m0 }*/ /* Does not use thumb1_gen_const_int. */ int diff --git a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c index 95370126ce8b..80a6b51138bd 100644 --- a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c +++ b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */ -/* { dg-options "-mpure-code -mcpu=cortex-m23 -march=armv8-m.base -mthumb -mfloat-abi=soft" } */ +/* { dg-require-effective-target arm_cpu_cortex_m23_ok } */ +/* { dg-options "-mpure-code" } */ +/* { dg-add-options arm_cpu_cortex_m23 } */ /* { dg-final { check-function-bodies "**" "" } } */ /* diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c b/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c index d797b790232e..4c457a6b7749 100644 --- a/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr109800.c @@ -1,4 +1,6 @@ /* { dg-do compile } */ -/* { dg-require-effective-target arm_hard_ok } */ -/* { dg-options "-O2 -march=armv7-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mbig-endian -mpure-code" } */ +/* { dg-require-effective-target arm_arch_v7em_hard_ok } */ +/* { dg-options "-O2 -mbig-endian -mpure-code" } */ +/* { dg-add-options arm_arch_v7em_hard }*/ + double f() { return 5.0; } diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c b/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c index 31061d5d4450..68c223fbd15e 100644 --- a/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr94538-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */ -/* { dg-options "-mpure-code -mcpu=cortex-m23 -march=armv8-m.base -mthumb -mfloat-abi=soft" } */ +/* { dg-require-effective-target arm_cpu_cortex_m23_ok } */ +/* { dg-options "-mpure-code" } */ +/* { dg-add-options arm_cpu_cortex_m23 } */ typedef int __attribute__ ((__vector_size__ (16))) V; diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 144d1a2d215d..593f02f6ea30 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -5781,6 +5781,7 @@ foreach { armfunc armflag armdefs } { v7r "-march=armv7-r+fp" __ARM_ARCH_7R__ v7m "-march=armv7-m -mthumb -mfloat-abi=soft" __ARM_ARCH_7M__ v7em "-march=armv7e-m+fp -mthumb" __ARM_ARCH_7EM__ + v7em_hard "-march=armv7e-m+fp -mfpu=auto -mfloat-abi=hard -mthumb" __ARM_ARCH_7EM__ v7ve "-march=armv7ve+fp -marm" "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV" v7ve_neon "-march=armv7ve+simd -mfpu=auto -mfloat-abi=softfp" @@ -5849,6 +5850,8 @@ foreach { armfunc armflag armdefs } { foreach { armfunc armflag armdefs } { xscale_arm "-mcpu=xscale -mfloat-abi=soft -marm" "__XSCALE__ && !__thumb__" cortex_a57 "-mcpu=cortex-a57" __ARM_ARCH_8A__ + cortex_m0 "-mcpu=cortex-m0 -mfloat-abi=soft -mthumb" "__ARM_ARCH_6M__ && __thumb__" + cortex_m23 "-mcpu=cortex-m23 -mfloat-abi=soft -mthumb" "__ARM_ARCH_8M_BASE__ && __thumb__" } { eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] { proc check_effective_target_arm_cpu_FUNC_ok { } {