https://gcc.gnu.org/g:0719ade048d66c91eebdcce07ae69e90a8385e1e
commit r15-5550-g0719ade048d66c91eebdcce07ae69e90a8385e1e
Author: Kewen Lin <li...@linux.ibm.com>
Date: Thu Nov 21 07:41:33 2024 +0000
rs6000: Remove ISA_3_0_MASKS_IEEE and check P9_VECTOR instead
When working to get rid of mask bit OPTION_MASK_P8_VECTOR,
I noticed that the check on ISA_3_0_MASKS_IEEE is actually
to check TARGET_P9_VECTOR, since we check all three mask
bits together and p9 vector guarantees p8 vector and vsx
should be enabled. So this patch is to adjust this first
as preparatory patch for the following patch to change
all uses of OPTION_MASK_P8_VECTOR and TARGET_P8_VECTOR.
gcc/ChangeLog:
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_IEEE): Remove.
* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
ISA_3_0_MASKS_IEEE check with TARGET_P9_VECTOR.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 6 ------
gcc/config/rs6000/rs6000.cc | 5 ++---
2 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-cpus.def
b/gcc/config/rs6000/rs6000-cpus.def
index 84fac8bdac1d..6f96d47eb728 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -68,12 +68,6 @@
| OPTION_MASK_P9_VECTOR) \
& ~OTHER_FUSION_MASKS)
-/* Support for the IEEE 128-bit floating point hardware requires a lot of the
- VSX instructions that are part of ISA 3.0. */
-#define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \
- | OPTION_MASK_P8_VECTOR \
- | OPTION_MASK_P9_VECTOR)
-
/* Flags that need to be turned off if -mno-power10. */
/* We comment out PCREL_OPT here to disable it by default because SPEC2017
performance was degraded by it. */
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 9cdf704824ce..fa0e2ce8eea5 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4189,12 +4189,11 @@ rs6000_option_override_internal (bool global_init_p)
because sometimes the compiler wants to put things in an integer
container, and if we don't have __int128 support, it is impossible. */
if (TARGET_FLOAT128_TYPE && !TARGET_FLOAT128_HW && TARGET_64BIT
- && (rs6000_isa_flags & ISA_3_0_MASKS_IEEE) == ISA_3_0_MASKS_IEEE
+ && TARGET_P9_VECTOR
&& !(rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW))
rs6000_isa_flags |= OPTION_MASK_FLOAT128_HW;
- if (TARGET_FLOAT128_HW
- && (rs6000_isa_flags & ISA_3_0_MASKS_IEEE) != ISA_3_0_MASKS_IEEE)
+ if (TARGET_FLOAT128_HW && (!TARGET_P9_VECTOR))
{
if ((rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) != 0)
error ("%qs requires full ISA 3.0 support", "%<-mfloat128-hardware%>");
