[gcc r15-5296] [RISC-V][V2] Fix type on vector move patterns

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:aaada43a2a91194a3c50e364d9dde277fb4b764b

commit r15-5296-gaaada43a2a91194a3c50e364d9dde277fb4b764b
Author: Jeff Law <j...@ventanamicro.com>
Date:   Thu Nov 14 16:57:50 2024 -0700

    [RISC-V][V2] Fix type on vector move patterns
    
    Updated version of my prior patch to fix type attributes on the
    pre-allocation vector move pattern.  This version just adds a suitable
    set of attributes to a second pattern that was obviously wrong.
    
    Passed on my tester for rv64 and rv32 crosses.  Bootstrapped and
    regression tested on riscv64-linux-gnu as well.
    
    --
    
    So I was looking into a horrific schedule for SAD a week or so ago and
    came across this gem.
    
    Basically we were treating a vector load as a vector move from a
    scheduling standpoint during sched1.  Naturally we didn't expose much
    ILP during sched1.  That in turn caused the register allocator to pack
    the pseudos onto the physical vector registers tightly.  regrename
    didn't do anything useful and the resulting code had too many false
    dependencies for sched2 to do anything useful.
    
    As a result we were taking many load->use stalls in x264's SAD routine.
    
    I'm confident the types are fine, but I'm a lot less sure about the
    other attributes (mode, avl_type_index, mode_idx).  If someone could
    take a look at that, it'd be greatly appreciated.
    
    There's other cases that may need similar treatment.  But I didn't want
    to muck with them until I understood those other attributes and how they
    need adjustments.
    
    In particular mov<VLS_AVL_REG:mode><P:mode>_lra appears to have the same
    problem.
    
    --
    
    gcc/
            * config/riscv/vector.md (mov<mode> pattern/splitter): Fix type and
            other attributes.
            (mov<VLS_AVL_REG:mode><P:mode>_lra): Likewise.

Diff:
---
 gcc/config/riscv/vector.md | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index c29e69d5c36d..a75c7ab9d086 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -1395,7 +1395,10 @@
     gcc_assert (ok_p);
     DONE;
   }
-  [(set_attr "type" "vmov")]
+  [(set_attr "type" "vlde,vste,vmov")
+   (set_attr "mode" "<MODE>")
+   (set (attr "avl_type_idx") (const_int INVALID_ATTRIBUTE))
+   (set (attr "mode_idx") (const_int INVALID_ATTRIBUTE))]
 )
 
 (define_expand "mov<mode>"
@@ -1442,7 +1445,10 @@
     }
   DONE;
 }
-  [(set_attr "type" "vmov")]
+  [(set_attr "type" "vlde,vste,vmov")
+   (set_attr "mode" "<VLS_AVL_REG:MODE>")
+   (set (attr "avl_type_idx") (const_int INVALID_ATTRIBUTE))
+   (set (attr "mode_idx") (const_int INVALID_ATTRIBUTE))]
 )
 
 (define_insn "*mov<mode>_vls"