https://gcc.gnu.org/g:660af960a66ae2e51c7c0f9516da39895f427320
commit 660af960a66ae2e51c7c0f9516da39895f427320
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Nov 12 16:44:07 2024 -0500
Update tests to work with architecture flags changes.
Two tests used -mvsx to raise the processor level to at least power7. These
tests were rewritten to add cpu=power7 support.
I have built both big endian and little endian bootstrap compilers and there
were no regressions.
In addition, I constructed a test case that used every archiecture define
(like
_ARCH_PWR4, etc.) and I also looked at the .machine directive generated. I
ran
this test for all supported combinations of -mcpu, big/little endian, and
32/64
bit support. Every single instance generated exactly the same code with the
patches installed compared to the compiler before installing the patches.
Can I install this patch on the GCC 15 trunk?
2024-11-12 Michael Meissner <meiss...@linux.ibm.com>
gcc/testsuite/
* gcc.target/powerpc/ppc-target-4.c: Rewrite the test to add
cpu=power7
when we need to add VSX support. Add test for adding cpu=power7
no-vsx
to generate only Altivec instructions.
* gcc.target/powerpc/pr115688.c: Add cpu=power7 when requesting VSX
instructions.
Diff:
---
gcc/testsuite/gcc.target/powerpc/ppc-target-4.c | 38 +++++++++++++++++++------
gcc/testsuite/gcc.target/powerpc/pr115688.c | 3 +-
2 files changed, 31 insertions(+), 10 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
index feef76db4618..5e2ecf34f249 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
@@ -2,7 +2,7 @@
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_fprs } */
/* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mno-altivec
-mabi=altivec -fno-unroll-loops" } */
-/* { dg-final { scan-assembler-times "vaddfp" 1 } } */
+/* { dg-final { scan-assembler-times "vaddfp" 2 } } */
/* { dg-final { scan-assembler-times "xvaddsp" 1 } } */
/* { dg-final { scan-assembler-times "fadds" 1 } } */
@@ -18,10 +18,6 @@
#error "__VSX__ should not be defined."
#endif
-#pragma GCC target("altivec,vsx")
-#include <altivec.h>
-#pragma GCC reset_options
-
#pragma GCC push_options
#pragma GCC target("altivec,no-vsx")
@@ -33,6 +29,7 @@
#error "__VSX__ should not be defined."
#endif
+/* Altivec build, generate vaddfp. */
void
av_add (vector float *a, vector float *b, vector float *c)
{
@@ -40,10 +37,11 @@ av_add (vector float *a, vector float *b, vector float *c)
unsigned long n = SIZE / 4;
for (i = 0; i < n; i++)
- a[i] = vec_add (b[i], c[i]);
+ a[i] = b[i] + c[i];
}
-#pragma GCC target("vsx")
+/* cpu=power7 must be used to enable VSX. */
+#pragma GCC target("cpu=power7,vsx")
#ifndef __ALTIVEC__
#error "__ALTIVEC__ should be defined."
@@ -53,6 +51,7 @@ av_add (vector float *a, vector float *b, vector float *c)
#error "__VSX__ should be defined."
#endif
+/* VSX build on power7, generate xsaddsp. */
void
vsx_add (vector float *a, vector float *b, vector float *c)
{
@@ -60,11 +59,31 @@ vsx_add (vector float *a, vector float *b, vector float *c)
unsigned long n = SIZE / 4;
for (i = 0; i < n; i++)
- a[i] = vec_add (b[i], c[i]);
+ a[i] = b[i] + c[i];
+}
+
+#pragma GCC target("cpu=power7,no-vsx")
+
+#ifndef __ALTIVEC__
+#error "__ALTIVEC__ should be defined."
+#endif
+
+#ifdef __VSX__
+#error "__VSX__ should not be defined."
+#endif
+
+/* Altivec build on power7 with no VSX, generate vaddfp. */
+void
+av2_add (vector float *a, vector float *b, vector float *c)
+{
+ unsigned long i;
+ unsigned long n = SIZE / 4;
+
+ for (i = 0; i < n; i++)
+ a[i] = b[i] + c[i];
}
#pragma GCC pop_options
-#pragma GCC target("no-vsx,no-altivec")
#ifdef __ALTIVEC__
#error "__ALTIVEC__ should not be defined."
@@ -74,6 +93,7 @@ vsx_add (vector float *a, vector float *b, vector float *c)
#error "__VSX__ should not be defined."
#endif
+/* Default power5 build, generate scalar fadds. */
void
norm_add (float *a, float *b, float *c)
{
diff --git a/gcc/testsuite/gcc.target/powerpc/pr115688.c
b/gcc/testsuite/gcc.target/powerpc/pr115688.c
index 5222e66ef170..00c7c301436a 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr115688.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr115688.c
@@ -7,7 +7,8 @@
/* Verify there is no ICE under 32 bit env. */
-__attribute__((target("vsx")))
+/* cpu=power7 must be used to enable VSX. */
+__attribute__((target("cpu=power7,vsx")))
int test (void)
{
return 0;
