https://gcc.gnu.org/g:3cde331e9590944819621bcde41ddbffd9bbf0ba
commit r15-3242-g3cde331e9590944819621bcde41ddbffd9bbf0ba
Author: Kito Cheng <kito.ch...@sifive.com>
Date: Tue Aug 27 21:27:02 2024 +0800
RISC-V: Add missing mode_idx for vrol and vror
We add pattern for vector rotate, but seems like we forgot adding
mode_idx which used in AVL propgation (riscv-avlprop.cc).
gcc/ChangeLog:
* config/riscv/vector.md (mode_idx): Add vrol and vror.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/rotr.c: New.
Diff:
---
gcc/config/riscv/vector.md | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c | 13 +++++++++++++
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 666719330c69..d0677325ba1d 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -816,7 +816,7 @@
vfcmp,vfminmax,vfsgnj,vfclass,vfmerge,vfmov,\
vfcvtitof,vfncvtitof,vfncvtftoi,vfncvtftof,vmalu,vmiota,vmidx,\
vimovxv,vfmovfv,vslideup,vslidedown,vislide1up,vislide1down,vfslide1up,vfslide1down,\
-
vgather,vcompress,vmov,vnclip,vnshift,vandn,vcpop,vclz,vctz")
+
vgather,vcompress,vmov,vnclip,vnshift,vandn,vcpop,vclz,vctz,vrol,vror")
(const_int 0)
(eq_attr "type" "vimovvx,vfmovvf")
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c
new file mode 100644
index 000000000000..055b28d1e787
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvbb -mabi=lp64d -fno-vect-cost-model
-mrvv-vector-bits=zvl" } */
+
+typedef int a;
+void *b;
+a c;
+void d() {
+ a e = c, f =0;
+ short *g = b;
+ for (; f < e; f++)
+ *(g + f) = (255 & (*(g + f) >> 8)) | *(g + f) << 8;
+}
+
