[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Allow non-duplicate bool patterns in expand_const_vector

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:a27d2ba5f655608dee585b6500bbdda17f488e91

commit a27d2ba5f655608dee585b6500bbdda17f488e91
Author: Patrick O'Neill <patr...@rivosinc.com>
Date:   Tue Aug 20 12:50:51 2024 -0700

    RISC-V: Allow non-duplicate bool patterns in expand_const_vector
    
    Currently we assert when encountering a non-duplicate boolean vector.
    This patch allows non-duplicate vectors to fall through to the
    gcc_unreachable and assert there.
    
    This will be useful when adding a catch-all pattern to emit costs and
    handle arbitary vectors.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv-v.cc (expand_const_vector): Allow non-duplicate
            to fall through other patterns before asserting.
    
    Signed-off-by: Patrick O'Neill <patr...@rivosinc.com>
    (cherry picked from commit 1cd890279668bf94c93004bdbb757a1342931914)

Diff:
---
 gcc/config/riscv/riscv-v.cc | 23 ++++++++---------------
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 8aaeaea29911..9b6c3a21e2d3 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1175,26 +1175,19 @@ expand_const_vector (rtx target, rtx src)
 {
   machine_mode mode = GET_MODE (target);
   rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
-  if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
-    {
-      rtx elt;
-      gcc_assert (
-       const_vec_duplicate_p (src, &elt)
-       && (rtx_equal_p (elt, const0_rtx) || rtx_equal_p (elt, const1_rtx)));
-      rtx ops[] = {result, src};
-      emit_vlmax_insn (code_for_pred_mov (mode), UNARY_MASK_OP, ops);
-
-      if (result != target)
-       emit_move_insn (target, result);
-      return;
-    }
-
   rtx elt;
   if (const_vec_duplicate_p (src, &elt))
     {
+      if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
+       {
+         gcc_assert (rtx_equal_p (elt, const0_rtx)
+                     || rtx_equal_p (elt, const1_rtx));
+         rtx ops[] = {result, src};
+         emit_vlmax_insn (code_for_pred_mov (mode), UNARY_MASK_OP, ops);
+       }
       /* Element in range -16 ~ 15 integer or 0.0 floating-point,
         we use vmv.v.i instruction.  */
-      if (valid_vec_immediate_p (src))
+      else if (valid_vec_immediate_p (src))
        {
          rtx ops[] = {result, src};
          emit_vlmax_insn (code_for_pred_mov (mode), UNARY_OP, ops);