[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Fix vector cfi notes for stack-clash protection

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:204928bdf68a333ff8ca232397fb6a29b91bbc6a

commit 204928bdf68a333ff8ca232397fb6a29b91bbc6a
Author: Raphael Moreira Zinsly <rzin...@ventanamicro.com>
Date:   Wed Aug 21 18:08:54 2024 -0300

    RISC-V: Fix vector cfi notes for stack-clash protection
    
    The stack-clash code is generating wrong cfi directives in
    riscv_v_adjust_scalable_frame because REG_CFA_DEF_CFA has a different
    encoding than REG_FRAME_RELATED_EXPR, this patch fixes the offset sign
    in prologue and starts using REG_CFA_DEF_CFA in the epilogue.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.cc (riscv_v_adjust_scalable_frame): Add
            epilogue code for stack-clash and fix prologue cfi note.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/stack-check-cfa-3.c: Fix the expected output.
    
    (cherry picked from commit a025081991cca1734fb642e6609772cfce8be4d1)

Diff:
---
 gcc/config/riscv/riscv.cc                          | 18 ++++++++++++++++--
 gcc/testsuite/gcc.target/riscv/stack-check-cfa-3.c |  3 ++-
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index e2a1737694a1..d7f8a2174225 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -7974,8 +7974,22 @@ riscv_v_adjust_scalable_frame (rtx target, poly_int64 
offset, bool epilogue)
 
   /* If doing stack clash protection then we use a loop to allocate and probe
      the stack.  */
-  if (flag_stack_clash_protection && !epilogue)
+  if (flag_stack_clash_protection)
     {
+      if (epilogue)
+       {
+         insn = emit_insn (gen_add3_insn (target, target, adjust_size));
+
+         if (!frame_pointer_needed)
+           {
+             add_reg_note (insn, REG_CFA_DEF_CFA,
+                       plus_constant (Pmode, stack_pointer_rtx, -offset));
+             RTX_FRAME_RELATED_P (insn) = 1;
+           }
+
+         return;
+       }
+
       HOST_WIDE_INT min_probe_threshold
        = (1 << param_stack_clash_protection_guard_size) - 
STACK_CLASH_CALLER_GUARD;
 
@@ -8008,7 +8022,7 @@ riscv_v_adjust_scalable_frame (rtx target, poly_int64 
offset, bool epilogue)
       if (!frame_pointer_needed)
        {
          add_reg_note (insn, REG_CFA_DEF_CFA,
-                       plus_constant (Pmode, stack_pointer_rtx, -offset));
+                       plus_constant (Pmode, stack_pointer_rtx, offset));
          RTX_FRAME_RELATED_P (insn) = 1;
        }
 
diff --git a/gcc/testsuite/gcc.target/riscv/stack-check-cfa-3.c 
b/gcc/testsuite/gcc.target/riscv/stack-check-cfa-3.c
index e45f7bb7df51..225dfae661d2 100644
--- a/gcc/testsuite/gcc.target/riscv/stack-check-cfa-3.c
+++ b/gcc/testsuite/gcc.target/riscv/stack-check-cfa-3.c
@@ -10,4 +10,5 @@
 
 /* { dg-final { scan-assembler-times {mv\tt3,sp} 1 } } */
 /* { dg-final { scan-assembler-times {\.cfi_def_cfa [0-9]+, 0} 1 } } */
-/* { dg-final { scan-assembler-times {\.cfi_escape 
0xf,0xa,0x72,0,0x92,0xa2,0x38,0,0x9,0xec,0x1e,0x22} 1 } } */
+/* { dg-final { scan-assembler-times {\.cfi_escape 
0xf,0x9,0x72,0,0x92,0xa2,0x38,0,0x3a,0x1e,0x22} 1 } } */
+/* { dg-final { scan-assembler-times {\.cfi_escape 
0xf,0xa,0x72,0,0x92,0xa2,0x38,0,0x9,0xf6,0x1e,0x22} 1 } } */