https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126081
--- Comment #12 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-16 branch has been updated by Stafford Horne <[email protected]>: https://gcc.gnu.org/g:e748bc14649a16b25c3655dd393d9844480a5609 commit r16-9241-ge748bc14649a16b25c3655dd393d9844480a5609 Author: Stafford Horne <[email protected]> Date: Sat Jul 4 10:51:59 2026 +0100 or1k: Stop allowing referring to SR_F in SImode and fix cmov We were seeing compiler errors such as: x.c:8:1: error: insn does not satisfy its constraints: 8 | } | ^ (insn 33 28 35 2 (set (reg:SI 34 ?sr_f) (reg:SI 16 r17 [52])) "x.c":6:7 discrim 1 28 {*movsi_internal} (nil)) during RTL pass: postreload This was being caused by previous commit c0694f95f59 ("or1k: Fix ICE in libgcc caused by recent validate_subreg changes") and commit 710581c80b2 ("or1k: Allow SImode for condition flag register") which allow referecing SR_F in SImode to avoid errors during if conversion. We can completely avoid this by reverting the changes to allow referencing SR_F in SImode and fixing the or1k_noce_conversion_profitable_p function to allow cmov expansion even when TARGET_CMOV is not enabled. The *cmov split logic can take care of lowering the *cmov instructions if l.cmov is not supported during the later split passes. gcc/ PR target/126081 * config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Stop allowing SImode for FLAG_REGS. (or1k_can_change_mode_class): Stop allowing SImode for FLAG_REGS. (or1k_noce_conversion_profitable_p): Always check or1k_is_cmov_insn. gcc/testsuite/ PR target/126081 * gcc.target/or1k/pr126081.c: New test. (cherry picked from commit 217a7679f4e50028f62f737c5906e3281c700ddc)
