[Bug target/124996] RISC-V: SET to (subreg:V2SI (reg:V4SI x) 0) causes reg x to spill

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124996

Robin Dapp <rdapp at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
                 CC|                            |rdapp at gcc dot gnu.org
   Last reconfirmed|                            |2026-06-30
     Ever confirmed|0                           |1

--- Comment #2 from Robin Dapp <rdapp at gcc dot gnu.org> ---
Confirmed, a patch to fix this is in flight.