https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125636
Eitan <etc_26 at yahoo dot com> changed:
What |Removed |Added
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Attachment #64646|0 |1
is obsolete| |
--- Comment #8 from Eitan <etc_26 at yahoo dot com> ---
Created attachment 64649
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=64649&action=edit
Patch v. 2, simplified
This patch fixes PR target/125636 by widening byte-extends from memory to
SImode
when TARGET_PARTIAL_REG_DEPENDENCY is true. This avoids the 16-bit
partial-register-
write false dependency that stalls out-of-order x86 processors.
The fix modifies the define_expand patterns for zero_extendqihi2 and
extendqihi2 to
emit a full QI->SI extend when the source is memory and
optimize_function_for_speed_p
is true. Register allocation coalesces the SImode pseudo with the HImode
destination,
eliminating the lowpart copy.
The test case verifies that byte-extends from memory use movzbl (32-bit)
instead of
movzbw (16-bit), avoiding the partial-register merge stall.
