https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56102
--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Roger Sayle <[email protected]>: https://gcc.gnu.org/g:373e2c30b1710e271664cf95fcfb66fea7dd15ed commit r17-1373-g373e2c30b1710e271664cf95fcfb66fea7dd15ed Author: Roger Sayle <[email protected]> Date: Fri Jun 5 14:53:27 2026 +0100 PR target/56102: Improve rtx_costs from -mthumb on ARM. This patch provides improved (more accurate) RTX costs for -mthumb on ARM. My recent patch for double word multiplication, PR 122871, revealed that the current costs for THUMB code on ARM are... let's say a little dubious. To demonstrate the code generation improvements provided by better thumb1_rtx_costs consider the function below (from PR middle-end/122871). long long foo (long long a) { long long c = a << 33; c += a; return c; } With the ARM backend's current costs, this produces 11 instructions with -O2 -mthumb. Before: movs r3, r0 movs r2, #0 adds r2, r2, r0 adcs r3, r3, r1 adds r2, r2, r2 adcs r3, r3, r3 subs r2, r2, r0 sbcs r3, r3, r1 movs r0, r2 movs r1, r3 bx lr With sane RTX costs, GCC now generate the much more reasonable 5 insns: After: movs r2, #0 lsls r3, r0, #1 adds r0, r0, r2 adcs r1, r1, r3 bx lr 2026-06-05 Roger Sayle <[email protected]> Richard Earnshaw <[email protected]> gcc/ChangeLog PR target/56102 PR middle-end/122871 * config/arm/arm.cc (thumb1_rtx_costs): Provide reasonable costs for PLUS, MINUS, COMPARE, AND, XOR, IOR, NEG, NOT, ASHIFT, ASHIFTRT and ROTATERT for SImode, DImode, HImode and QImode. (thumb1_size_rtx_costs): Likewise. (comp_not_to_clear_mask_str_un): Silence host compiler warning.
