[Bug target/122152] riscv64 uses a vector segmented load instead of a vector strided load

[lilin at masscore dot cn via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122152

--- Comment #5 from Lin Li <lilin at masscore dot cn> ---
In face, the issues I'm concerned about have no direct connection with the
optimizations you want to make. It's just for reference.