https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80770
Jeffrey A. Law <law at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
--- Comment #9 from Jeffrey A. Law <law at gcc dot gnu.org> ---
So Shreya has a nice little pattern for RISC-V which cleans up the generated
code significantly. Obviously as a RISC-V backend pattern it doesn't help
other targets.
However, looking at that pattern it has become apparent to me that this can be
fixed in simplify-rtx and significantly help other targets. Let's consider
flipping a boolean field on x86:
movzbl (%rdi), %eax
movl %eax, %edx
andl $-2, %eax
andl $1, %edx
xorl $1, %edx
orl %edx, %eax
movb %al, (%rdi)
Compare to:
xorb $1, (%rdi)
Yup. It collapses down to a single instruction. For giggles I verified we see
the same kind of improvement on the H8.
mov.b @er0,r2l
mov.b r2l,r3l
and #-128,r3l
add.b #-128,r3l
and #127,r2l
or r3l,r2l
mov.b r2l,@er0
Turns into:
mov.b @er0,r2l
add.b #-128,r2l
mov.b r2l,@er0
Not quite a bnot #7,@er0 that I'd like to see, but that's a function of the bit
being tested. Other bit positions are handled via a trivial bnot. Further
improvement would be a target specific issue that I'm not planning to tackle.
Point being, Shreya and I have this under control at this point. It's not
appropriate for gcc-16, but is in the queue for gcc-17.
devel/jlaw/pr80770 for anyone that wants to play around.
