https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116509
--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> --- Created attachment 62607 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62607&action=edit current patch except for movcc This my current patch except for movcc support. There is also a few other things missing optimizations: * sbcs uses a temp register instead of xzr as the output. But it seems to work for cbranch and cset. and even movcc with SImode; I didn't test DImode. TI mode conditional move is not working.
