[Bug rtl-optimization/101882] [16 Regression] combine vs. insn with earlyclobber and input and output set to a hard register

[segher at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882

--- Comment #14 from Segher Boessenkool <segher at gcc dot gnu.org> ---
                  (match_operand:DI 1 "register_operand" "r0")

That means either a general register ("r"), or the same thing as operand 0
(that's what "0" means)!

So the backend explicitly allows it here.