https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115458
--- Comment #15 from Jeffrey A. Law <law at gcc dot gnu.org> --- I was concerned about that hardreg usage as well. It's from argument setup. I did an experiment around that, essentially reporting that vector regs were always likely to be spilled. That prevents us from using the hard register in a complex insn and (as expected) the complex insn sets a pseudo which is then copied into the appropriate hard reg. It all looked quite sensible, but it didn't change the failure mode. Don't get me wrong, argument passing is part of the triggering prereqs, essentially the uses as argument registers crank up the register pressure at the key point. A single one of these grouped registers can be live at this point and LRA should be able to handle it (by tying one of the inputs to one of the outputs). If two register groups are live and unspillable, then there won't be any valid path for reloading. That's esentially the thread to pull on today. I'm not a fan of the whole LMUL concept. But it is what it is :(
