https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118755
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> --- (In reply to Andrew Pinski from comment #2) > I think the first thing we could do is (from fwprop1): > ``` > propagating insn 13 into insn 14, replacing: > (set (reg:SI 103 [ _3 ]) > (reg/v:SI 104 [ <retval> ])) > successfully matched this instruction to *zero_extendqisi2_aarch64: > (set (reg:SI 103 [ _3 ]) > (zero_extend:SI (subreg:QI (reg:SI 108) 0))) > original cost = 4 (weighted: 4.000000), replacement cost = 4 (weighted: > 4.000000); rejecting replacement > change not profitable > propagating insn 13 into insn 15, replacing: > (set (reg:SI 109) > (and:SI (reg/v:SI 104 [ <retval> ]) > (const_int 1 [0x1]))) > failed to match this instruction: > (set (reg:SI 109) > (zero_extend:SI (and:QI (subreg:QI (reg:SI 108) 0) > (const_int 1 [0x1])))) > ``` > That should just be simplified to: > (set (reg:SI 109) (and:SI (reg:SI 108) (const_int 1 [0x1]))) > > Though I am not sure this will fix everything. It does not fix it but it is still a good thing to do.