------- Additional Comments From pinskia at gcc dot gnu dot org 2004-10-15 18:12
-------
This is definitely a target problem, the RTL is correct:
(insn:HI 23 22 24 (set (reg:QI 0 ax [orig:60 D.1459 ] [60])
(mem:QI (reg/v/f:SI 2 cx [orig:63 from ] [63]) [0 S1 A8])) 48 {*movqi_1} (nil)
(nil))
I think the comment in i386.md summarizies the issues:
;; Situation is quite tricky about when to choose full sized (SImode) move
;; over QImode moves. For Q_REG -> Q_REG move we use full size only for
;; partial register dependency machines (such as AMD Athlon), where QImode
;; moves issue extra dependency and for partial register stalls machines
;; that don't use QImode patterns (and QImode move cause stall on the next
;; instruction).
;;
;; For loads of Q_REG to NONQ_REG we use full sized moves except for partial
;; register stall machines with, where we use QImode instructions, since
;; partial register stall can be caused there. Then we use movzx.
--
What |Removed |Added
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Component|c |target
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18019
