https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116845
--- Comment #9 from Konstantinos Eleftheriou <konstantinos.eleftheriou at vrull
dot eu> ---
This is optimized in x86 using -m32 during "combine", the problem is that the
test cases check for the optimization in GIMPLE. But, this isn't the case for
AArch64 using ILP32, which isn't optimized at all.
Given this example:
```
int foo(int *a, int j)
{
int k = j - 1;
return a[j - 1] == a[k];
}
```
The generated RTL for accessing the index in `a[j-1]` is:
```
(insn 10 9 11 2 (set (reg:SI 117)
(const_int 1073741823 [0x3fffffff])) {*movsi_aarch64}
(nil))
(insn 11 10 12 2 (set (reg:SI 116)
(plus:SI (reg/v:SI 114 [ j ])
(reg:SI 117))) {*addsi3_aarch64}
(expr_list:REG_DEAD (reg:SI 117)
(expr_list:REG_EQUAL (plus:SI (reg/v:SI 114 [ j ])
(const_int 1073741823 [0x3fffffff]))
(nil))))
(insn 12 11 14 2 (set (reg:SI 120)
(ashift:SI (reg:SI 116)
(const_int 2 [0x2]))) {*aarch64_ashl_sisd_or_int_si3}
(expr_list:REG_DEAD (reg:SI 116)
(nil)))
```
The generated RTL for accessing the index in `a[k]` is:
```
(insn 16 15 17 2 (set (reg:SI 122)
(plus:SI (reg/v:SI 114 [ j ])
(const_int -1 [0xffffffffffffffff]))) {*addsi3_aarch64}
(expr_list:REG_DEAD (reg/v:SI 114 [ j ])
(nil)))
(insn 17 16 19 2 (set (reg:SI 125)
(ashift:SI (reg:SI 122)
(const_int 2 [0x2]))) {*aarch64_ashl_sisd_or_int_si3}
(expr_list:REG_DEAD (reg:SI 122)
(nil)))
```
"Combine" successfuly matches the first case to an instruction in the backend,
after performing a split, giving this result:
```
(set (reg:SI 116)
(ashift:SI (reg/v:SI 114 [ j ])
(const_int 2 [0x2])))
(set (reg:SI 120)
(plus:SI (reg:SI 116)
(const_int -4 [0xfffffffffffffffc])))
```
But, fails to do the same for the second case, given that the split is
performed only when there are more than 2 instructions involved.
This leads to having the expressions `4j - 4` in the first case and `4(j-1)` in
the second one, which are not treated as equal.
Any ideas on where we should handle this? Any feedback would be appreciated.
