https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118623

--- Comment #12 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
1370Trying 35 -> 20:
1371   35: flags:CCC=cmp(zero_extract(r104:SI,0x1,r105:SI#0),0)
1372      REG_DEAD r104:SI
1373      REG_DEAD r105:SI
1374   20: pc={(flags:CCC!=0)?L26:pc}
1375      REG_BR_PROB 1073741831
1376      REG_DEAD flags:CCZ
1377Successfully matched this instruction:
1378(set (pc)
1379    (if_then_else (ne (zero_extract:SI (reg/v:SI 104 [ g ])
1380                (const_int 1 [0x1])
1381                (subreg:QI (reg:SI 105 [ _1 ]) 0))
1382            (const_int 0 [0]))
1383        (label_ref:DI 26)
1384        (pc)))

The problem is here, {(flags:CCC!=0)?L26:pc} means when bit CCC is not set
which should be equal to
   (eq (zero_extract:SI (reg/v:SI 104 [ g ])
1380                   (const_int 1 [0x1])
1381                   (subreg:QI (reg:SI 105 [ _1 ]) 0) 0).

Not *ne*, Looks like rtl simplication handle CFLAGS differently from backend?

In i386.md, there's explicitly reverse for the condition code when handling
zero_extract against zero with CCCmode.

19178(define_insn_and_split "*jcc_bt<mode>"
19179  [(set (pc)
19180        (if_then_else (match_operator 0 "bt_comparison_operator"
19181                        [(zero_extract:SWI48
19182                           (match_operand:SWI48 1 "nonimmediate_operand")
19183                           (const_int 1)
19184                           (match_operand:QI 2 "nonmemory_operand"))
19185                         (const_int 0)])
19186                      (label_ref (match_operand 3))
19187                      (pc)))
19188   (clobber (reg:CC FLAGS_REG))]
19189  "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
19190   && (CONST_INT_P (operands[2])
19191       ? (INTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)
19192          && INTVAL (operands[2])
19193               >= (optimize_function_for_size_p (cfun) ? 8 : 32))
19194       : !memory_operand (operands[1], <MODE>mode))
19195   && ix86_pre_reload_split ()"
19196  "#"
19197  "&& 1"
19198  [(set (reg:CCC FLAGS_REG)
19199        (compare:CCC
19200          (zero_extract:SWI48
19201            (match_dup 1)
19202            (const_int 1)
19203            (match_dup 2))
19204          (const_int 0)))
19205   (set (pc)
19206        (if_then_else (match_op_dup 0 [(reg:CCC FLAGS_REG) (const_int 0)])
19207                      (label_ref (match_dup 3))
19208                      (pc)))]
19209{
19210  operands[0] = shallow_copy_rtx (operands[0]);
19211  PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0])));
19212})

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