[Bug rtl-optimization/118067] [15 Regression] ICE: in lra_split_hard_reg_for, at lra-assigns.cc:1860 (unable to find a register to spill) {*lshrhi3_1} with -O -fno-split-wide-types -mavx512f

[ubizjak at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118067

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
The problematic insn is still:

(insn 9 5 10 2 (parallel [
            (set (reg:HI 99 [ _2 ])
                (lshiftrt:HI (subreg:HI (reg/v:V32HI 165 [ u ]) 0)
                    (const_int 1 [0x1])))
            (clobber (reg:CC 17 flags))
        ]) "pr118067.c":10:8 1215 {*lshrhi3_1}
     (expr_list:REG_UNUSED (reg:CC 17 flags)
        (nil)))

But now reload tries to reload input operand with:

    Inserting insn reload before:
  191: r337:HI=r165:V32HI#0

      Creating newreg=338, assigning class NO_REGS to secondary r338
  191: r337:HI=r165:V32HI#0
    Inserting the sec. move after:
  192: r337:HI#0=r338:SI

  191: r337:HI=r165:V32HI#0
    Changing on before:
  193: r338:SI=r165:V32HI#0

deleting insn with uid = 191.

      Choosing alt 0 in insn 192:  (0) =r  (1) g {*movsi_internal}
      Creating newreg=339, assigning class GENERAL_REGS to r339
  192: r339:SI=r338:SI
    Inserting insn reload after:
  194: r337:HI#0=r339:SI

      Choosing alt 1 in insn 194:  (0) m  (1) re {*movsi_internal}
      Change to class INDEX_GPR16 for r339
      Creating newreg=340, assigning class NO_REGS to r340
  194: r340:SI=r339:SI
    Inserting insn reload after:
  195: r337:HI#0=r340:SI

      Choosing alt 0 in insn 195:  (0) =r  (1) g {*movsi_internal}
      Creating newreg=341, assigning class GENERAL_REGS to r341
  195: r341:SI=r340:SI
    Inserting insn reload after:
  196: r337:HI#0=r341:SI

      Choosing alt 1 in insn 196:  (0) m  (1) re {*movsi_internal}
      Change to class INDEX_GPR16 for r341
      Creating newreg=342, assigning class NO_REGS to r342
  196: r342:SI=r341:SI
    Inserting insn reload after:
  197: r337:HI#0=r342:SI

And looping from here.