[Bug target/113828] ICE: in riscv_expand_mult_with_const_int, at config/riscv/riscv.cc:2587 with -march=rv64ifv and vfloat32m1_t/vfloat32m4_t function args

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113828

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #1 from Jeffrey A. Law <law at gcc dot gnu.org> ---
So you're not supposed to be able to turn on V without also turning on M.  This
was fixed at some point during the gcc-15 cycle to issue a suitable diagnostic:

cc1: sorry, unimplemented: Currently the ‘V’ implementation requires the ‘M’
extension