[Bug target/117438] x86's pass_align_tight_loops may cause performance regression in nested loops

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117438

--- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuho...@gcc.gnu.org>:

https://gcc.gnu.org/g:6350e956d1a74963a62bedabef3d4a1a3f2d4852

commit r15-5489-g6350e956d1a74963a62bedabef3d4a1a3f2d4852
Author: MayShao-oc <mayshao...@zhaoxin.com>
Date:   Thu Nov 7 10:57:02 2024 +0800

    Add microarchtecture tunable for pass_align_tight_loops [PR117438]

    Hi Hongtao:
       Add m_CASCADELAK, and m_SKYLAKE_AVX512.
       Place X86_TUNE_ALIGN_TIGHT_LOOPS in the appropriate section.

       Bootstrapped X86_64.
       Ok for trunk?
    BR
    Mayshao
    gcc/ChangeLog:

            PR target/117438
            * config/i386/i386-features.cc (TARGET_ALIGN_TIGHT_LOOPS):
            default true in all processors except for m_ZHAOXIN, m_CASCADELAKE,
and
            m_SKYLAKE_AVX512.
            * config/i386/i386.h (TARGET_ALIGN_TIGHT_LOOPS): New Macro.
            * config/i386/x86-tune.def (X86_TUNE_ALIGN_TIGHT_LOOPS):
            New tune