https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114801
--- Comment #39 from Christophe Lyon <clyon at gcc dot gnu.org> --- A bit more context: https://developer.arm.com/documentation/101028/0012/14--M-profile-Vector-Extension--MVE--intrinsics The section about predicates uses the word 'lanes' and says 'When calling a predicated intrinsic, the predicate mask value should contain the same value in all bits corresponding to the same element of an input or output vector. For example, an instruction operating on 32-bit vector elements should have a predicate mask in which each block of 4 bits is either all 0 or all 1.' .... 'Users wishing to exploit the MVE architecture's predication behavior in finer detail than this constraint permits are encouraged to use inline assembly.' So, while the HW operates on bytes, users should not use 0xcccc or 0x8181 as constant predicates for a V4SI: what's the intent in terms of lanes? I think we should accept only all 1s or all 0s, and if that's not the case either emit an error or convert anything != 0 to all 1s with a warning. Note that instructions which generate predicates will always produce all 1s or all 0s.
