https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116425
Dusan Stojkovic <dusan.stojko...@rt-rk.com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |dusan.stojko...@rt-rk.com
--- Comment #2 from Dusan Stojkovic <dusan.stojko...@rt-rk.com> ---
I found that adding the extra flag: -mrvv-vector-bits=zvl vectorizes the
testcase function like so (regardless of whether -mrvv-max-lmul=m1 is included
in the compile flags):
permute_vnx8si:
vl1re32.v v2,0(a0)
vsetivli zero,8,e32,m1,ta,ma
vrgather.vi v1,v2,1
vs1r.v v1,0(a2)
ret
permute_vnx16si:
vl2re32.v v4,0(a0)
vsetivli zero,16,e32,m2,ta,ma
vrgather.vi v2,v4,1
vs2r.v v2,0(a2)
ret
Gobolt: https://godbolt.org/z/5qEfGj9nP
Ordering of these instructions seems off (vector load before vsetvl?). Also it
seems as though rvv-max-lmul doesn't bind lmul if rvv-vector-bits=zvl is
specified.
