https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116919
Bug ID: 116919
Summary: extra zext for bitwise operations with a constant
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: artemiy at synopsys dot com
Target Milestone: ---
Created attachment 59245
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59245&action=edit
patch v0.1
Consider the following code (reduced from coremark):
unsigned short crcu8(unsigned short crc, int x16) {
int i;
for (i = 0; i < 8; i++)
if (++x16 == 1)
crc |= 0x8000;
return crc;
}
On 32-bit RISC-V, this compiles to:
crcu8:
addi a4,a1,8
li a5,1
li a3,-32768
.L3:
addi a1,a1,1
beq a1,a5,.L6
bne a1,a4,.L3
ret
.L6:
or a0,a0,a3
zext.h a0,a0
bne a1,a4,.L3
ret
If the constant were zero-extended (i.e. +32768), the zext.h instruction could
have been avoided.
Attaching a proposed fix (unregtested and without a new testcase yet).
gcc -v output:
$ riscv32-unknown-elf-gcc -v
Using built-in specs.
COLLECT_GCC=/SCRATCH/art/install/riscv-gnu-toolchain/bin/riscv32-unknown-elf-gcc
COLLECT_LTO_WRAPPER=/SCRATCH/art/install/riscv-gnu-toolchain/libexec/gcc/riscv32-unknown-elf/15.0.0/lto-wrapper
Target: riscv32-unknown-elf
Configured with: /SCRATCH/art/src/gcc/configure --target=riscv32-unknown-elf
--prefix=/SCRATCH/art/install/riscv-gnu-toolchain --disable-shared
--disable-threads --disable-tls --enable-languages=c,c++ --with-system-zlib
--with-newlib
--with-sysroot=/SCRATCH/art/install/riscv-gnu-toolchain/riscv32-unknown-elf
--disable-libmudflap --disable-libssp --disable-libquadmath --disable-libgomp
--disable-nls --disable-tm-clone-registry --src=/SCRATCH/art/src/gcc
--disable-multilib --with-abi=ilp32 --with-arch=rv32ima --with-tune=rocket
--with-isa-spec=20191213 'CFLAGS_FOR_TARGET=-Os -g ' 'CXXFLAGS_FOR_TARGET=-Os
-g '
Thread model: single
Supported LTO compression algorithms: zlib zstd
gcc version 15.0.0 20241001 (experimental) (GCC)
