https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212
--- Comment #330 from Oleg Endo <olegendo at gcc dot gnu.org> --- (In reply to Kazumoto Kojima from comment #325) > > Our movsf logic for LRA doesn't handle these well. If these reg from/to > subreg of SImode move is splitted with fpul, it will cause some very bad > code or ICE. I just re-checked PR 116709 ... a known issue from before, where it would ferry values unnecessarily through FPUL. I think there's also a chance for that to happen without LRA, but not usually. Maybe FPUL should be hidden from register allocation.... anyway its use is always limited to hold some intermediate value. I don't think it ever holds values over a longer live range. (similar story/issue as gp-reg R0)
