https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212

--- Comment #276 from Kazumoto Kojima <kkojima at gcc dot gnu.org> ---
It will take some time to sort out the known issues and there may be unknown
problems.  Further testing with gcc-15 sounds like a good idea.

Here is a list of known issues and their status.

* call_pcrel patterns: match_scratch can cause ICE for the corner case.  We use
a fixed register instead of scratch as a quick fix.  More investigation is
needed.

* movsf: match_scratch can be satisfied with memory displacement unexpectedly. 
It may be solved with splitting movesf_ie_ra to several patterns to remove
match_scratch.  Work in progress.

* mov<mode>, extend<mode>: Some QIHI move or extend patterns will make long R0
live ranges for the indexed/short-displacement memory and could confuse LRA. 
We define new {mov,extend}<mode> patterns for them with hard R0 to shorten R0
live ranges.

* sfunc: Looks some hard reg clobbering patterns don't work with LRA.  We get a
handy test case.  More investigation is needed.

Current my assumption on the sfunc issue: LRA doesn't handle the clobber hard
reg pattern if that hard reg is recognized as the input reg.  I don't know the
direct way to give the output modifier to the raw hard reg pattern.  I'm trying
match_operand instead of raw reg so to modify it to the output.  For example,
rewriting block_lump_real_i4 to

(define_insn "block_lump_real_i4"
  [(parallel [(set (mem:BLK (match_operand:SI 2 "" "r,r"))
                   (mem:BLK (match_operand:SI 3 "" "r,r")))
              (use (match_operand:SI 0 "arith_reg_operand" "r,r"))
              (use (match_operand 1 "" "Z,Ccl"))
              (use (match_operand:SI 4 "" "r,r"))
              (clobber (match_scratch:SI 5 "=2,2"))
              (clobber (match_scratch:SI 6 "=3,3"))
              (clobber (match_scratch:SI 7 "=4,4"))
              (clobber (reg:SI PR_REG))
              (clobber (reg:SI T_REG))
              (clobber (reg:SI R0_REG))
              (clobber (reg:SI R1_REG))
              (clobber (reg:SI R2_REG))
              (clobber (reg:SI R3_REG))])]
  "TARGET_HARD_SH4"
  "@
        jsr     @%0%#
        bsrf    %0\n%O1:%#"
  [(set_attr "type" "sfunc")
   (set_attr "needs_delay_slot" "yes")])

with setting operands[2] = r4, operands[3] = r5 and operands[4] = r6 looks
working as expected.  block_lump_real, udivsi3_i1, udivsi3_i4 and
udivsi3_i4_single have the similar issue.  I'll test the similar changes of
those sfuncs.

FYI, it seems that LRA handles call insns specially so as to process the
clobber pattern of the input hard reg.  These are based on my vague
understanding of RA, though.

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