https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116336
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The first change is in reload (LRA):
without -g:
Creating newreg=102 from oldreg=98, assigning class ALL_SSE_REGS to r102
13: [`duk_js_execute_bytecode_duk__tv_0_0']=r102:DF
Inserting insn reload before:
26: r102:DF=r98:DF
Considering alt=0 of insn 26: (0) =Yf*f (1) Yf*fm
0 Costly loser: reject++
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
1 Non pseudo reload: reject++
overall=615,losers=2,rld_nregs=1
Considering alt=1 of insn 26: (0) m (1) Yf*f
Using memory insn operand 0: reject+=3
0 Non input pseudo reload: reject++
1 Costly loser: reject++
1 Non-prefered reload: reject+=600
overall=617,losers=2 -- refuse
Considering alt=2 of insn 26: (0) Yf*f (1) G
0 Costly loser: reject++
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=8 of insn 26: (0) ?r (1) rm
Staticly defined alt reject+=6
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
1 Non pseudo reload: reject++
overall=614,losers=1,rld_nregs=1
Considering alt=9 of insn 26: (0) ?m (1) rC
Staticly defined alt reject+=6
Using memory insn operand 0: reject+=3
0 Non input pseudo reload: reject++
Cycle danger: overall += LRA_MAX_REJECT
overall=622,losers=2,rld_nregs=1
Considering alt=10 of insn 26: (0) ?r (1) C
Staticly defined alt reject+=6
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=11 of insn 26: (0) ?r (1) F
Staticly defined alt reject+=6
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=12 of insn 26: (0) Yv (1) C
0 Non pseudo reload: reject++
Bad operand -- refuse
Considering alt=13 of insn 26: (0) v (1) v
0 Non pseudo reload: reject++
Cycle danger: overall += LRA_MAX_REJECT
overall=607,losers=1,rld_nregs=1
Considering alt=14 of insn 26: (0) v (1) m
0 Non pseudo reload: reject++
1 Non pseudo reload: reject++
overall=2,losers=0,rld_nregs=0
Choosing alt 14 in insn 26: (0) v (1) m {*movdf_internal}
Change to class SSE_REGS for r102
Change to class NO_REGS for r98
Considering alt=0 of insn 14: (0) rBwBz
overall=0,losers=0,rld_nregs=0
Choosing alt 0 in insn 14: (0) rBwBz {*call}
Spilling non-eliminable hard regs: 7
vs with:
Inserting insn reload before:
28: r102:DF=r98:DF
Considering alt=0 of insn 28: (0) =Yf*f (1) Yf*fm
0 Costly loser: reject++
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
1 Non pseudo reload: reject++
overall=615,losers=2,rld_nregs=1
Considering alt=1 of insn 28: (0) m (1) Yf*f
Using memory insn operand 0: reject+=3
0 Non input pseudo reload: reject++
1 Costly loser: reject++
1 Non-prefered reload: reject+=600
overall=617,losers=2 -- refuse
Considering alt=2 of insn 28: (0) Yf*f (1) G
0 Costly loser: reject++
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=8 of insn 28: (0) ?r (1) rm
Staticly defined alt reject+=6
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
1 Non pseudo reload: reject++
overall=614,losers=1,rld_nregs=1
Considering alt=9 of insn 28: (0) ?m (1) rC
Staticly defined alt reject+=6
Using memory insn operand 0: reject+=3
0 Non input pseudo reload: reject++
Cycle danger: overall += LRA_MAX_REJECT
overall=622,losers=2,rld_nregs=1
Considering alt=10 of insn 28: (0) ?r (1) C
Staticly defined alt reject+=6
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=11 of insn 28: (0) ?r (1) F
Staticly defined alt reject+=6
0 Non-prefered reload: reject+=600
0 Non input pseudo reload: reject++
Bad operand -- refuse
Considering alt=12 of insn 28: (0) Yv (1) C
0 Non pseudo reload: reject++
Bad operand -- refuse
Considering alt=13 of insn 28: (0) v (1) v
0 Non pseudo reload: reject++
Cycle danger: overall += LRA_MAX_REJECT
overall=607,losers=1,rld_nregs=1
Considering alt=14 of insn 28: (0) v (1) m
0 Non pseudo reload: reject++
1 Non pseudo reload: reject++
overall=2,losers=0,rld_nregs=0
Choosing alt 14 in insn 28: (0) v (1) m {*movdf_internal}
Change to class SSE_REGS for r102
Considering alt=0 of insn 16: (0) rBwBz
overall=0,losers=0,rld_nregs=0
Choosing alt 0 in insn 16: (0) rBwBz {*call}
Spilling non-eliminable hard regs: 7
