https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116273

            Bug ID: 116273
           Summary: [14/15 regression] RISC-V: gcc.dg/long_branch.c flakey
                    timeout
           Product: gcc
           Version: 15.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ewlu at rivosinc dot com
  Target Milestone: ---

Our postcommit ci has been seeing the long_branch.c testcase flakily fail since
r14-7128-g1a51886a79c.

https://github.com/patrick-rivos/gcc-postcommit-ci/issues?page=2&q=long_branch.c

It appears to mostly affect rv32 linux/newlib targets. I'm not sure if it is
due to contention during heavy workloads.

test log:
Executing on host:
/home/runner/work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-newlib-stage2/gcc/xgcc
-B/home/runner/work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-newlib-stage2/gcc/

/home/runner/work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/gcc/gcc/testsuite/gcc.dg/long_branch.c
 -march=rv32gc -mabi=ilp32d -mcmodel=medlow   -fdiagnostics-plain-output   -O2
-fno-reorder-blocks      -lm  -o ./long_branch.exe    (timeout = 600)
spawn -ignore SIGHUP
/home/runner/work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-newlib-stage2/gcc/xgcc
-B/home/runner/work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/build/build-gcc-newlib-stage2/gcc/
/home/runner/work/gcc-postcommit-ci/gcc-postcommit-ci/riscv-gnu-toolchain/gcc/gcc/testsuite/gcc.dg/long_branch.c
-march=rv32gc -mabi=ilp32d -mcmodel=medlow -fdiagnostics-plain-output -O2
-fno-reorder-blocks -lm -o ./long_branch.exe
WARNING: program timed out
compiler exited with status 1
FAIL: gcc.dg/long_branch.c (test for excess errors)
Excess errors:
exit status is 1
UNRESOLVED: gcc.dg/long_branch.c compilation failed to produce executable

Schedule of variations:
    riscv-sim/-march=rv32gc/-mabi=ilp32d/-mcmodel=medlow

Running target riscv-sim/-march=rv32gc/-mabi=ilp32d/-mcmodel=medlow

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