https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116131
--- Comment #5 from Christoph Müllner <cmuellner at gcc dot gnu.org> --- I've prepared a patchset that eliminates the optimization patterns for XThead(F)MemIdx, which produce the non-canonical MEMs. As a side-effect, this change also fixes the issue reported here. However, it also triggers another ICE (in the case of enabled XThead(F)MemIdx and XTheadFmv/Zfa), which is addressed in the last patch of the series: https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659676.html https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659677.html https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659678.html
