https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116266
Bug ID: 116266
Summary: rs6000: P10 vector insn ICE with -mno-vsx
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: linkw at gcc dot gnu.org
Target Milestone: ---
I happened to notice that our Power10 vector instructions are only guarded with
TARGET_POWER10, some ICE is like:
#include "altivec.h"
vector unsigned char
foo (vector unsigned char a , vector unsigned char b, vector unsigned char c)
{
return vec_ternarylogic (a,b,c,128);
}
Option: -mcpu=power10 -mno-vsx
during RTL pass: expand
In file included from
/opt/gcc-nightly/trunk/lib/gcc/powerpc64le-unknown-linux-gnu/15.0.0/include/altivec.h:58,
from ice.c:1:
ice.c: In function ‘foo’:
ice.c:6:12: internal compiler error: in copy_to_mode_reg, at explow.cc:657
6 | return vec_ternarylogic (a,b,c,128);
| ^~~~~~~~~~~~~~~~
0x120b2253 internal_error(char const*, ...)
/home/gccbuild/gcc_trunk_git/gcc/gcc/diagnostic-global-context.cc:491
0x10300533 fancy_abort(char const*, int, char const*)
/home/gccbuild/gcc_trunk_git/gcc/gcc/diagnostic.cc:1772
0x1071f4eb copy_to_mode_reg(machine_mode, rtx_def*)
/home/gccbuild/gcc_trunk_git/gcc/gcc/explow.cc:657
0x1142e3bf rs6000_expand_builtin(tree_node*, rtx_def*, rtx_def*, machine_mode,
int)
/home/gccbuild/gcc_trunk_git/gcc/gcc/config/rs6000/rs6000-builtin.cc:3557
0x1074f933 expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
/home/gccbuild/gcc_trunk_git/gcc/gcc/expr.cc:12376
0x10762113 store_expr(tree_node*, rtx_def*, int, bool, bool)
/home/gccbuild/gcc_trunk_git/gcc/gcc/expr.cc:6766
0x10766103 expand_assignment(tree_node*, tree_node*, bool)
/home/gccbuild/gcc_trunk_git/gcc/gcc/expr.cc:6487
0x10766103 expand_assignment(tree_node*, tree_node*, bool)
/home/gccbuild/gcc_trunk_git/gcc/gcc/expr.cc:5975
0x105a248f expand_call_stmt
/home/gccbuild/gcc_trunk_git/gcc/gcc/cfgexpand.cc:2893
0x105a248f expand_gimple_stmt_1
/home/gccbuild/gcc_trunk_git/gcc/gcc/cfgexpand.cc:3962
0x105a248f expand_gimple_stmt
/home/gccbuild/gcc_trunk_git/gcc/gcc/cfgexpand.cc:4104
0x105a4387 expand_gimple_basic_block
/home/gccbuild/gcc_trunk_git/gcc/gcc/cfgexpand.cc:6160
0x105a68e7 execute
/home/gccbuild/gcc_trunk_git/gcc/gcc/cfgexpand.cc:6899
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
-----
I think not having TARGET_P10_VECTOR isn't intentional, as we still allow
-mno-vsx with -mcpu=power10. We have TARGET_P8_VECTOR and TARGET_P9_VECTOR for
P8 and P9 vector support respectively, we should have a similar
TARGET_P10_VECTOR which can be TARGET_POWER10 && TARGET_VSX underlying, also
need enum bif_enable ENB_P10V and so on.
