[Bug rtl-optimization/116096] [15 Regression] during RTL pass: cprop_hardreg ICE: in extract_insn, at recog.cc:2848 (unrecognizable insn ashift:TI?) with -O2 -flive-range-shrinkage -fno-peephole2 -mstackrealign

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116096

--- Comment #4 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuho...@gcc.gnu.org>:

https://gcc.gnu.org/g:64ca25aec4939aea79bd812b089fbb666ca6f2fd

commit r15-2539-g64ca25aec4939aea79bd812b089fbb666ca6f2fd
Author: liuhongt <hongtao....@intel.com>
Date:   Fri Jul 26 09:56:03 2024 +0800

    Fix mismatch between constraint and predicate for ashl<mode>3_doubleword.

    (insn 98 94 387 2 (parallel [
                (set (reg:TI 337 [ _32 ])
                    (ashift:TI (reg:TI 329)
                        (reg:QI 521)))
                (clobber (reg:CC 17 flags))
            ]) "test.c":11:13 953 {ashlti3_doubleword}

    is reloaded into

    (insn 98 452 387 2 (parallel [
                (set (reg:TI 0 ax [orig:337 _32 ] [337])
                    (ashift:TI (const_int 1671291085 [0x639de0cd])
                        (reg:QI 2 cx [521])))
                (clobber (reg:CC 17 flags))

    since constraint n in the pattern accepts that.
    (Not sure why reload doesn't check predicate)

    (define_insn "ashl<mode>3_doubleword"
      [(set (match_operand:DWI 0 "register_operand" "=&r,&r")
            (ashift:DWI (match_operand:DWI 1 "reg_or_pm1_operand" "0n,r")
                        (match_operand:QI 2 "nonmemory_operand" "<S>c,<S>c")))

    The patch fixes the mismatch between constraint and predicate.

    gcc/ChangeLog:

            PR target/116096
            * config/i386/constraints.md (Wc): New constraint for integer
            1 or -1.
            * config/i386/i386.md (ashl<mode>3_doubleword): Refine
            constraint with Wc.

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr116096.c: New test.