https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116065
--- Comment #7 from Hongyu Wang <hongyuw at gcc dot gnu.org> --- (In reply to Andrew Pinski from comment #6) > (In reply to Andrew Pinski from comment #5) > > then if that is the case then aarch64 started with r14-6290-g9f0f7d802482a8 > > (which added OPT_mearly_ra_ to aarch_option_optimization_table). > > > > What happens if you mark -munroll-only-small-loops as Optimization ? > > if that works, then aarch64 fix is to mark -mearly-ra= as Optimization too. > > Yes this fixes aarch64 testcase: > ``` > diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt > index 2f90f10352a..6229bcb371e 100644 > --- a/gcc/config/aarch64/aarch64.opt > +++ b/gcc/config/aarch64/aarch64.opt > @@ -256,7 +256,7 @@ EnumValue > Enum(early_ra_scope) String(none) Value(AARCH64_EARLY_RA_NONE) > > mearly-ra= > -Target RejectNegative Joined Enum(early_ra_scope) Var(aarch64_early_ra) > Init(AARCH64_EARLY_RA_NONE) Save > +Target RejectNegative Joined Enum(early_ra_scope) Var(aarch64_early_ra) > Init(AARCH64_EARLY_RA_NONE) Optimization > Specify when to enable an early register allocation pass. The possibilities > are: all functions, functions that have access to strided multi-register > instructions, and no functions. > > ``` > > So yes adding Optimization to -munroll-only-small-loops should fix that too. Confirmed, append Optimization fixed this issue in x86. I'm quite confused by how the unmarked Optimization seems resets the flags, the target attribute was overrided and the error reports like isa flag mismatched.
