https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115969

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #6)
> The problem is here:
> ```
> /* Return TRUE if OP is a valid vector addressing mode.  */
> 
> bool
> aarch64_simd_mem_operand_p (rtx op)
> {
>   return MEM_P (op) && (GET_CODE (XEXP (op, 0)) == POST_INC
>                         || REG_P (XEXP (op, 0)));
> }
> ```
> 
> It does not check the mem address to be correct..

Maybe that should use aarch64_classify_address ...

This has been latent since aarch64 backend was added too.

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