https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688
--- Comment #34 from Mayshao-oc at zhaoxin dot com --- (In reply to Jakub Jelinek from comment #17) > Fixed for AMD on the library side too. > We need a statement from Zhaoxin and VIA for their CPUs. Sorry for the late reply. We guarantee that VMOVDQA will be an atomic load or store provided 128 bit aligned address in Zhaoxin processors, provided that the memory type is WB. Can we extend this patch to Zhaoxin processors as well?
