https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115849
Bug ID: 115849
Summary: RISC-V should improve handling of -0.0 when
-fno-signed-zeros is enabled
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: law at gcc dot gnu.org
Target Milestone: ---
When -fno-signed-zeros is enabled the RISC-V port should treat -0.0 just like
0.0, roughly mirroring other ports like aarch64.
A mostly complete patch can be found here -- ignore the discussion around the
testcase and focus on the ability to optimize FP code ever-so-slightly:
https://patchwork.sourceware.org/project/gcc/patch/20240102115538.1471137-1-pan2...@intel.com/
I don't think the implementation of "riscv_const_zero_rtx_p" is really correct.
If you ask for the mode of (const_int 0) you're going to get back VOIDmode.
So while checking CONST0_RTX (mode) is generally good, we need to make sure
that the mode used in that check is sane.
I suspect the most useful case to optimize would be storing -0.0 into memory
and perhaps loading -0.0 into an FPR via fmv.s.x or fmv.d.x with x0 as the
source.
