[Bug target/114734] [14] RISC-V rv64gcv_zvl256b miscompile with -flto -O3 -mrvv-vector-bits=zvl

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114734

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
probably -fwhole-program is enough, -flto not needed(?)

  # vectp_g.248_1401 = PHI <vectp_g.248_1402(32), &g(143)>
...
  _1411 = .SELECT_VL (ivtmp_1409, POLY_INT_CST [2, 2]);
..
  vect__193.250_1403 = .MASK_LEN_LOAD (vectp_g.248_1401, 32B, { -1, ... },
_1411, 0);
  vect__194.251_1404 = -vect__193.250_1403;
  vect_iftmp.252_1405 = (vector([2,2]) long int) vect__194.251_1404;

  # vect_iftmp.252_1406 = PHI <vect_iftmp.252_1405(5)>
  # loop_len_1427 = PHI <_1411(5)>
...
  _1407 = loop_len_1427 + 18446744073709551615;
  _1408 = .VEC_EXTRACT (vect_iftmp.252_1406, _1407);
  iftmp.3_1204 = _1408;

is stored to b[15].  Doesn't look too odd to me.