https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114252
--- Comment #12 from Georg-Johann Lay <gjl at gcc dot gnu.org> --- (In reply to Richard Biener from comment #10) > I think the target controls the "libcall" ABI that's used for calls to > libgcc, You have a pointer how to do it or an example? IIRC I looked into it quite a while ago, and it didn't allow to specify/adjust call_used_regs[] etc. > I think the target should implement an inline bswap, possibly via a > define_insn_and_split or define_split so the byte ops are only exposed > at a desired point; important points being lower_subreg (split-wide-types) > and register allocation - possibly lower_subreg should itself know > how to handle bswap (though the degenerate AVR case is quite special). That would result in SUBREGs all over the place. As Vladimir pointed out in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110093#c5 DFA doesn't handle subregs properly, and register alloc then uses extra reloads, bloating the code (not only in PR110093 but also 114243. Unlikely any pass will untangle the mess of four (set (subreg:QI (SI)) (subreg:QI (SI))) > Yeah. Or comparing to open-coding the bswap without going through the call. > I don't have a AVR libgcc around, but libgcc2.s has > > #ifdef L_bswapsi2 > SItype > __bswapsi2 (SItype u) > { > return ((((u) & 0xff000000u) >> 24) > | (((u) & 0x00ff0000u) >> 8) > | (((u) & 0x0000ff00u) << 8) > | (((u) & 0x000000ffu) << 24)); > } > #endif The libgcc side is not a problem at all, libgcc/config/avr/lib1funcs.S has: ;; swap two registers with different register number .macro bswap a, b eor \a, \b eor \b, \a eor \a, \b .endm #if defined (L_bswapsi2) ;; swap bytes ;; r25:r22 = bswap32 (r25:r22) DEFUN __bswapsi2 bswap r22, r25 bswap r23, r24 ret ENDF __bswapsi2 #endif /* defined (L_bswapsi2) */ #if defined (L_bswapdi2) ;; swap bytes ;; r25:r18 = bswap64 (r25:r18) DEFUN __bswapdi2 bswap r18, r25 bswap r19, r24 bswap r20, r23 bswap r21, r22 ret ENDF __bswapdi2 #endif /* defined (L_bswapdi2) */ There's currently no handcrafted bswap16 though.