https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113602
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |rguenth at gcc dot
gnu.org
--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
(gdb) p tem.last ()
$2 = (vn_reference_op_struct &) @0x7fffffffc820: {opcode = VAR_DECL,
clique = 0, base = 0, reverse = 0, align = 0, off = {coeffs = {-1}},
type = <bitint_type 0x7ffff6bb9690>, op0 = <var_decl 0x7ffff6a19c60 r>,
op1 = <tree 0x0>, op2 = <tree 0x0>}
(gdb) p debug_vn_reference_ops (tem)
{array_ref<_4,0,1>,view_convert_expr,r}
(gdb) p debug_generic_expr (addr)
&VIEW_CONVERT_EXPR<unsigned long[8]>(r)[_4]
We're valueizing
MEM <vector(2) unsigned long> [(_BitInt(503) *)vectp.5_18]
trying to forward the vectp.5_18 def
vectp.5_18 = &VIEW_CONVERT_EXPR<unsigned long[8]>(r)[_4];
but we're not anticipating this shape of a non-invariant ADDR_EXPR. We
do wrap all VAR_DECLs but DECL_HARD_REGISTER inside a MEM_REF but then
a DECL_HARD_REGISTER shouldn't be addressable so the IL is actually
invalid, generated by vectorization (but not diagnosed by IL checking).
I'm not sure to what extent we should try to paper over this though ...
The following works for me:
diff --git a/gcc/tree-data-ref.cc b/gcc/tree-data-ref.cc
index ae55bf6aa48..f37734b5340 100644
--- a/gcc/tree-data-ref.cc
+++ b/gcc/tree-data-ref.cc
@@ -1182,7 +1182,12 @@ dr_analyze_innermost (innermost_loop_behavior *drb, tree
ref,
base = TREE_OPERAND (base, 0);
}
else
- base = build_fold_addr_expr (base);
+ {
+ if (may_be_nonaddressable_p (base))
+ return opt_result::failure_at (stmt,
+ "failed: base not addressable.\n");
+ base = build_fold_addr_expr (base);
+ }
if (in_loop)
{
