https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113280
--- Comment #9 from Segher Boessenkool <segher at gcc dot gnu.org> --- (In reply to Alexander Monakov from comment #6) > From the context given in the gcc-help thread, the goal is to place an > optimization barrier in a sequence of floating-point calculation. "+r" is > inappropriate for floats, as it usually incurs a reload from a > floating-point register to a GPR and back, and there's no universal > constraint for FP regs (e.g. on amd64 it is "+x" for SSE registers, but "+t" > for long double (or x87 FPU on 32-bit x86)). Yup. "Some target-specific register constraint" :-)
