[Bug target/112337] arm: ICE in arm_effective_regno when compiling for MVE

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337

--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkac...@gcc.gnu.org>:

https://gcc.gnu.org/g:ddb479e796bee3964ddb6a2daa8f79598e47cede

commit r14-5447-gddb479e796bee3964ddb6a2daa8f79598e47cede
Author: Saurabh Jha <saurabh....@arm.com>
Date:   Tue Nov 14 14:48:40 2023 +0000

    Add a REG_P check for inc and dec for Arm MVE

    This patch tightens mve_vector_mem_operand to reject non-register operands
inside {PRE,POST}_{INC,DEC} addresses by introducing a REG_P check.

    This patch fixes this
ICE:https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337

    gcc/ChangeLog:

            PR target/112337
            * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for
INC
            and DEC operations.

    gcc/testsuite/ChangeLog:

            PR target/112337
            * gcc.target/arm/mve/pr112337.c: Test for REG_P check for INC and
DEC
            operations.