[Bug target/111832] RISC-V: ICE on dynamic LMUL

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111832

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:cf7739d4a6ba0b88068877d14439436c22b57630

commit r14-4700-gcf7739d4a6ba0b88068877d14439436c22b57630
Author: Juzhe-Zhong <juzhe.zh...@rivai.ai>
Date:   Tue Oct 17 15:30:39 2023 +0800

    RISC-V: Enable more tests for dynamic LMUL and bug fix[PR111832]

    Last time, Robin has mentioned that dynamic LMUL will cause ICE in SPEC:

    https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629992.html

    which is caused by assertion FAIL.

    When we enable more currents in rvv.exp with dynamic LMUL, such issue can
be
    reproduced and has a PR:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111832

    Now, we enable more tests in rvv.exp in this patch and fix the bug.

            PR target/111832

    gcc/ChangeLog:

            * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New
function.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/rvv.exp: Enable more dynamic tests.