[Bug middle-end/111391] RISC-V Vector: ICE in lra_split_hard_reg_for during reload pass

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111391

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:86451305d8b2a25e7c6ea6c2f1ee69c419cba3ef

commit r14-4077-g86451305d8b2a25e7c6ea6c2f1ee69c419cba3ef
Author: Juzhe-Zhong <juzhe.zh...@rivai.ai>
Date:   Thu Sep 14 18:49:52 2023 +0800

    RISC-V: Expand VLS mode to scalar mode move[PR111391]

    This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111391

            PR target/111391

    gcc/ChangeLog:

            * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
            (vec_extract<mode><vel>): Ditto.
            * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
            (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
            * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to
scalar mode move.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/partial/slp-9.c: Adapt test.
            * gcc.target/riscv/rvv/autovec/pr111391-1.c: New test.
            * gcc.target/riscv/rvv/autovec/pr111391-2.c: New test.