[Bug target/94866] Failure to optimize pinsrq of 0 with index 1 into movq

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94866

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:6dd73f0f00f454a05552b008a1d56560bd3f1d4a

commit r14-3471-g6dd73f0f00f454a05552b008a1d56560bd3f1d4a
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Thu Aug 24 22:23:52 2023 +0200

    i386: Optimize pinsrq of 0 with index 1 into movq [PR94866]

    Add new pattern involving vec_merge RTX that is produced by combine from
the
    combination of sse4_1_pinsrq and *movdi_internal:

        7: r86:DI=0
        8: r85:V2DI=vec_merge(vec_duplicate(r86:DI),r87:V2DI,0x2)
          REG_DEAD r87:V2DI
          REG_DEAD r86:DI
    Successfully matched this instruction:
    (set (reg:V2DI 85 [ a ])
        (vec_merge:V2DI (reg:V2DI 87)
            (const_vector:V2DI [
                    (const_int 0 [0]) repeated x2
                ])
            (const_int 1 [0x1])))

            PR target/94866

    gcc/ChangeLog:

            * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.

    gcc/testsuite/ChangeLog:

            * g++.target/i386/pr94866.C: New test.