[Bug target/111119] New: maskload and maskstore for integer modes are oddly conditional on AVX2

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111119

            Bug ID: 111119
           Summary: maskload and maskstore for integer modes are oddly
                    conditional on AVX2
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rguenth at gcc dot gnu.org
  Target Milestone: ---

We have

(define_expand "maskload<mode><sseintvecmodelower>"
  [(set (match_operand:V48_AVX2 0 "register_operand")
    (unspec:V48_AVX2
      [(match_operand:<sseintvecmode> 2 "register_operand")
       (match_operand:V48_AVX2 1 "memory_operand")]
      UNSPEC_MASKMOV))]
  "TARGET_AVX")

and

(define_mode_iterator V48_AVX2
  [V4SF V2DF
   V8SF V4DF
   (V4SI "TARGET_AVX2") (V2DI "TARGET_AVX2")
   (V8SI "TARGET_AVX2") (V4DI "TARGET_AVX2")])

so for example maskloadv4siv4si is disabled with just -mavx while the actual
instruction can operate just fine on SImode sized data by pretending its
SFmode.

check_effective_target_vect_masked_load is conditional on AVX, not AVX2.

With just AVX we can still use SSE2 vectorization for integer operations using
masked loads/stores from AVX.